A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded...

A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications

Tabasy, Ehsan Zhian, Shafik, Ayman, Lee, Keytaek, Hoyos, Sebastian, Palermo, Samuel
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Volume:
49
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2014.2358568
Date:
November, 2014
File:
PDF, 4.18 MB
english, 2014
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