High-Performance High-$K$/Metal Planar Self-Aligned Gate-All-Around CMOS Devices
Pouydebasque, A., Denorme, S., Loubet, N., Wacquez, R., Bustos, J., Leverd, F., Deloffre, E., Barnola, S., Dutartre, D., Coronel, P., Skotnicki, T.Volume:
7
Language:
english
Journal:
IEEE Transactions on Nanotechnology
DOI:
10.1109/tnano.2008.2002981
Date:
September, 2008
File:
PDF, 1012 KB
english, 2008