[Japan Soc. Appl. Phys 1995 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (6-8 June 1995)] 1995 Symposium on VLSI Technology. Digest of Technical Papers - High performance 0.3 μm CMOS using I-line lithography and BARC
Thakar, G.V., Madan, S.K., Garza, C.M., Krisa, W.L., Nicollian, P.E., Wise, J.L., Lee, C.K., McKee, J.A., Appel, A.T., Esquivel, A.L., McNeil, V.M., Prinslow, D.A., Riemenschneider, B.R., Utsumi, T.,Year:
1995
Language:
english
DOI:
10.1109/vlsit.1995.520865
File:
PDF, 339 KB
english, 1995