A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit
Tachibana, Fumihiko, Hirabayashi, Osamu, Takeyama, Yasuhisa, Shizuno, Miyako, Kawasumi, Atsushi, Kushida, Keiichi, Suzuki, Azuma, Niki, Yusuke, Sasaki, Shinichi, Yabe, Tomoaki, Unekawa, YasuoVolume:
49
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/jssc.2013.2280312
Date:
January, 2014
File:
PDF, 2.24 MB
english, 2014