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[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Application of a yield model merging critical areas and defectivity to industrial products
Levasseur, S., Duvivier, F.Year:
1997
Language:
english
DOI:
10.1109/dftvs.1997.628304
File:
PDF, 363 KB
english, 1997