A Multimode Shuffled Iterative Decoder Architecture for...

IEEE Transactions on Circuits and Systems I: Regular Papers 2010 / 10 Vol. 57; Iss. 10

A Multimode Shuffled Iterative Decoder Architecture for High-Rate RS-LDPC Codes

Ueng, Yeong-Luh, Yang, Chung-Jay, Wang, Kuan-Chieh, Chen, Chun-Jung
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Volume:
57
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/tcsi.2010.2046964
Date:
October, 2010
File:
PDF, 1.28 MB
english, 2010
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