Underlap Optimization in HFinFET in Presence of Interface...

IEEE Transactions on Nanotechnology 2011 / 11 Vol. 10; Iss. 6

Underlap Optimization in HFinFET in Presence of Interface Traps

Majumdar, Kausik, Konjady, Rajaram Shetty, Suryaprakash, Raj Tejas, Bhat, Navakanta
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Volume:
10
Language:
english
Journal:
IEEE Transactions on Nanotechnology
DOI:
10.1109/tnano.2011.2119401
Date:
November, 2011
File:
PDF, 513 KB
english, 2011
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