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[IEEE 2006 IEEE International High Level Design Validation and Test Workshop - Monterey, CA, USA (2006.11.8-2006.11.10)] 2006 IEEE International High Level Design Validation and Test Workshop - Addressing Test Generation Challenges for Configurable Processor Verification
Rimon, M., Lichtenstein, Y., Adir, A., Jaeger, I., Vinov, M., Johnson, S., Jani, D.Year:
2006
Language:
english
DOI:
10.1109/hldvt.2006.319970
File:
PDF, 8.07 MB
english, 2006