Enhancing Low Temperature Analog Performance of Underlap...

IEEE Transactions on Electron Devices 2014 / 11 Vol. 61; Iss. 11

Enhancing Low Temperature Analog Performance of Underlap FinFET at Scaled Gate Lengths

Nandi, Ashutosh, Saxena, Ashok K., Dasgupta, Sudeb
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Volume:
61
Language:
english
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/ted.2014.2353139
Date:
November, 2014
File:
PDF, 1.76 MB
english, 2014
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