[IEEE Comput. Soc 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - San Francisco, CA, USA (24-26 Oct. 2001)] Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Evaluation of clock distribution networks' most likely faults and produced effects
Metra, C., Di Francescantonio, S., Mak, T.M., Ricco, B.Year:
2001
Language:
english
DOI:
10.1109/dftvs.2001.966789
File:
PDF, 164 KB
english, 2001