Electrical Performance Evaluation of FIB Edited Circuits through Chip Backside Exposing Shallow Trench Isolations
R. Schlangen, U. Kerst, A. Kabakow, C. BoitVolume:
45
Year:
2005
Language:
english
Pages:
6
DOI:
10.1016/j.microrel.2005.07.033
File:
PDF, 1.26 MB
english, 2005