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[IEEE 2010 17th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2010) - Singapore, Singapore (2010.07.5-2010.07.9)] 2010 17th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits - ESD protection design with lateral DMOS transistor in 40-V BCD technology
Chang-Tzu Wang,, Ker, Ming-Dou, Tien-Hao Tang,, Kuan-Cheng Su,Year:
2010
Language:
english
DOI:
10.1109/ipfa.2010.5532308
File:
PDF, 296 KB
english, 2010