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[Japan Soc. Appl. Phys 2001 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (12-14 June 2001)] 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184) - High performance sub-50 nm CMOS with advanced gate stack
Qi Xiang,, Bin Yu,, Haihong Wang,, Ming-Ren Lin,Year:
2001
Language:
english
DOI:
10.1109/vlsit.2001.934928
File:
PDF, 255 KB
english, 2001