![](/img/cover-not-exists.png)
[IEEE 2008 Symposium on VLSI Technology - Honolulu, HI, USA (2008.06.17-2008.06.19)] 2008 Symposium on VLSI Technology - Novel 3-D structure for ultra high density flash memory with VRAT (Vertical-Recess-Array-Transistor) and PIPE (Planarized Integration on the same PlanE)
Jiyoung Kim,, Hong, Augustin J., Masaaki Ogawa,, Siguang Ma,, Song, Emil B., You-Sheng Lin,, Jeonghee Han,, U-In Chung,, Wang, Kang L.Year:
2008
Language:
english
DOI:
10.1109/vlsit.2008.4588587
File:
PDF, 2.14 MB
english, 2008