[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal,...

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[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Detectability conditions for interconnection open defects

Champac, V.H., Zenteno, A.
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Year:
2000
Language:
english
DOI:
10.1109/VTEST.2000.843859
File:
PDF, 222 KB
english, 2000
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