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[IEEE 2008 Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) - Seoul, Korea (South) (2008.12.10-2008.12.12)] 2008 Electrical Design of Advanced Packaging and Systems Symposium - Power integrity estimation by use of LSI power-pin model applying chip-package-board co-design
Harada, Takashi, Masashi Ogawa,, Manabu Kusumoto,, Wabuka, HiroshiYear:
2008
Language:
english
DOI:
10.1109/edaps.2008.4735984
File:
PDF, 783 KB
english, 2008