[IEEE Comput. Soc. Press 14th VLSI Test Symposium - Princeton, NJ, USA (28 April-1 May 1996)] Proceedings of 14th VLSI Test Symposium - Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring
Manich, S., Nicolaidis, M., Figueras, J.Year:
1996
Language:
english
DOI:
10.1109/VTEST.1996.510846
File:
PDF, 525 KB
english, 1996