[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Reduction of power dissipation through parallel optimization of test vector and scan register sequences
Kotasek, Zdenek, Skarvada, Jaroslav, Strnadel, JosefYear:
2010
Language:
english
DOI:
10.1109/ddecs.2010.5491750
File:
PDF, 326 KB
english, 2010