[IEEE 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (7-9 Feb. 2000)] 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056) - A 7.1 GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS

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