[IEEE 2010 IEEE CPMT Symposium Japan (Formerly VLSI...

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[IEEE 2010 IEEE CPMT Symposium Japan (Formerly VLSI Packaging Workshop of Japan) - Tokyo, Japan (2010.08.24-2010.08.26)] 2010 IEEE CPMT Symposium Japan - Design trade-off for resonance reduction of multiple power planes in Super Ball Grid Array (SBGA) package

Kim, GaWon, Lee, SeungJae, Yu, JiHeon, Misman, Ozgur, Bae, KiCheol, Kim, TaeKi, Lee, Sangwoong, Kim, JinYoung
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Year:
2010
Language:
english
DOI:
10.1109/CPMTSYMPJ.2010.5679670
File:
PDF, 632 KB
english, 2010
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