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[IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Tunis, Tunisia (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Ground bounce modelling for digital gigascale integrated circuits
Pons, M., Martorell, F., Aragones, X., Moll, F., Rubio, A.Year:
2006
Language:
english
DOI:
10.1109/dtis.2006.1708724
File:
PDF, 342 KB
english, 2006