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[IEEE 2009 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA) - Hsinchu, Taiwan (2009.04.27-2009.04.29)] 2009 International Symposium on VLSI Technology, Systems, and Applications - Fermi level depinning for the design of III–V FET source/drain contacts
Hu, Jenny, Guan, Ximeng, Choi, Donghun, Harris, James S., Saraswat, Krishna, Wong, H. -S. PhilipYear:
2009
Language:
english
DOI:
10.1109/vtsa.2009.5159321
File:
PDF, 228 KB
english, 2009