[IEEE Comput. Soc 7th Asia and South Pacific Design Automation Conference. 15h International Conference on VLSI Design - Bangalore, India (7-11 Jan. 2002)] Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design - Evaluation of statistical outlier rejection methods for I/sub DDQ/ limit setting
Sabade, S., Walker, H.Year:
2002
DOI:
10.1109/aspdac.2002.995024
File:
PDF, 871 KB
2002