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[IEEE International Electron Devices Meeting. Technical Digest - Washington, DC, USA (2-5 Dec. 2001)] International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224) - An enhanced 130 nm generation logic technology featuring 60 nm transistors optimized for high performance and low power at 0.7 - 1.4 V
Thompson, S., Alavi, M., Arghavani, R., Brand, A., Bigwood, R., Brandenburg, J., Crew, B., Dubin, V., Hussein, M., Jacob, P., Kenyon, C., Lee, E., Mcintyre, B., Ma, Z., Moon, P., Nguyen, P., Prince, MYear:
2001
Language:
english
DOI:
10.1109/iedm.2001.979479
File:
PDF, 310 KB
english, 2001