[IEEE 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Yokohama, Japan (2014.9.9-2014.9.11)] 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Verilog-A compact model for oxide-based resistive random access memory (RRAM)
Jiang, Zizhen, Yu, Shimeng, Wu, Yi, Engel, Jesse H., Guan, Ximeng, Wong, H.-S. PhilipYear:
2014
Language:
english
DOI:
10.1109/sispad.2014.6931558
File:
PDF, 1.65 MB
english, 2014