Development of multilayer process with upper wiring layer...

Physica C: Superconductivity 2006 Vol. 445-448; Iss. none

Development of multilayer process with upper wiring layer for HTS circuit application

Yoshihiro Ishimaru, Makoto Ogura, Osami Horibe, Seiji Adachi, Hironori Wakana, Kohei Nakayama, Yoshinobu Tarutani, Ushio Kawabe, Keiichi Tanabe
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Volume:
445-448
Year:
2006
Language:
english
Pages:
4
DOI:
10.1016/j.physc.2006.05.069
File:
PDF, 151 KB
english, 2006
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