Fine-Grain Voltage Tuned Cache Architecture for Yield Management Under Process Variations
Joonho Kong,, Yan Pan,, Ozdemir, S., Mohan, A., Memik, G., Sung Woo Chung,Volume:
20
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2011.2159634
Date:
August, 2012
File:
PDF, 415 KB
english, 2012