[IEEE Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005. - Kyoto, Japan (June 14-16, 2005)] Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005. - Nonvolatile MOSFET memory based on high density wn nanocrystal layer fabricated by novel PNL (pulsed nucleation layer) method
Seung-Hyun Lim,, Kyong Hee Joo,, Jin-Ho Park,, Sang-Woo Lee,, Woong Hee Sohn,, Changwon Lee,, Gil Heyun Choi,, In-Seok Yeo,, U-In Chung,, Joo Tae Moon,, Byung-Il Ryu,Year:
2005
Language:
english
DOI:
10.1109/.2005.1469263
File:
PDF, 390 KB
english, 2005