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[IEEE Comput. Soc 23rd IEEE VLSI Test Symposium - Palm Springs, CA, USA (1-5 May 2005)] 23rd IEEE VLSI Test Symposium (VTS'05) - A BIST Scheme for FPGA Interconnect Delay Faults
Chun-Chieh Wang,, Jing-Jia Liou,, Yen-Lin Peng,, Chih-Tsun Huang,, Cheng-Wen Wu,Year:
2005
Language:
english
DOI:
10.1109/vts.2005.5
File:
PDF, 147 KB
english, 2005