A Methodology for Transistor-Efficient Supergate Design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2007 / 04 Vol. 15; Iss. 4

A Methodology for Transistor-Efficient Supergate Design

Kagaris, Dimitri, Haniotakis, Themistoklis
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Volume:
15
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2007.895248
Date:
April, 2007
File:
PDF, 246 KB
english, 2007
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