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[IEEE 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Singapore (27 Nov.-1 Dec. 1995)] Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits - Design and implementation of a fully testable CMOS D-latch
Aissi, C., Olaniyan, J.Year:
1995
Language:
english
DOI:
10.1109/ipfa.1995.487622
File:
PDF, 511 KB
english, 1995