![](/img/cover-not-exists.png)
[IEEE 2013 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu (2013.4.22-2013.4.24)] 2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) - A layout-aware automatic sizing approach for retargeting analog integrated circuits
Yen-Lung Chen,, Yi-Ching Ding,, Yu-Ching Liao,, Hsin-Ju Chang,, Liu, C-N J.Year:
2013
Language:
english
DOI:
10.1109/vldi-dat.2013.6533820
File:
PDF, 665 KB
english, 2013