Optimization for chip stack in 3-D packaging

Optimization for chip stack in 3-D packaging

Hara, K., Kurashima, Y., Hashimoto, N., Matsui, K., Matsuo, Y., Miyazawa, I., Kobayashi, T., Yokoyama, Y., Fukazawa, M.
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Volume:
28
Language:
english
Journal:
IEEE Transactions on Advanced Packaging
DOI:
10.1109/tadvp.2005.852978
Date:
August, 2005
File:
PDF, 2.91 MB
english, 2005
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