![](/img/cover-not-exists.png)
[IEEE 2008 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2008.12.15-2008.12.17)] 2008 IEEE International Electron Devices Meeting - A 45nm low power system-on-chip technology with dual gate (logic and I/O) high-k/metal gate strained silicon transistors
Jan, C.-H., Bai, P., Biswas, S., Buehler, M., Chen, Z.-P., Curello, G., Gannavaram, S., Hafez, W., He, J., Hicks, J., Jalan, U., Lazo, N., Lin, J., Lindert, N., Litteken, C., Jones, M., Kang, M., KomeYear:
2008
Language:
english
DOI:
10.1109/iedm.2008.4796772
File:
PDF, 1.19 MB
english, 2008