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[IEEE ESSCIRC 2014 - 40th European Solid State Circuits Conference - Venice Lido, Italy (2014.9.22-2014.9.26)] ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC) - A 6.2mW 7b 3.5GS/s time interleaved 2-stage pipelined ADC in 40nm CMOS
Spagnolo, Annachiara, Verbruggen, Bob, D'Amico, Stefano, Wambacq, PietYear:
2014
Language:
english
DOI:
10.1109/esscirc.2014.6942025
File:
PDF, 2.81 MB
english, 2014