[IEEE 2007 IEEE International Electron Devices Meeting - Washington, DC, USA (2007.12.10-2007.12.12)] 2007 IEEE International Electron Devices Meeting - Junction Profile Engineering with a Novel Multiple Laser Spike Annealing Scheme for 45-nm Node High Performance and Low Leakage CMOS Technology
Yamamoto, T., Kubo, T., Sukegawa, T., Takii, E., Shimamune, Y., Tamura, N., Sakoda, T., Nakamura, M., Ohta, H., Miyashita, T., Kurata, H., Satoh, S., Kase, M., Sugii, T.Year:
2007
Language:
english
DOI:
10.1109/iedm.2007.4418885
File:
PDF, 3.38 MB
english, 2007