3D Chip Stack Technology Using Through-Chip Interconnects

IEEE Design & Test of Computers 2005 / 06 Vol. 22; Iss. 6

3D Chip Stack Technology Using Through-Chip Interconnects

Benkart, P., Kaiser, A., Munding, A., Bschorr, M., Pfleiderer, H.-J., Kohn, E., Heittmann, A., Huebner, H., Ramacher, U.
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Volume:
22
Language:
english
Journal:
IEEE Design and Test of Computers
DOI:
10.1109/mdt.2005.125
Date:
June, 2005
File:
PDF, 251 KB
english, 2005
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