A new self-aligned subtractive gate process for high-voltage and complementary polycrystalline silicon thin-film transistors
Wu, I-Wei, Huang, Tiao-Yuan, Lewis, Alan G., Chuang, T. C., Chiang, AnneVolume:
68
Year:
1990
Language:
english
Journal:
Journal of Applied Physics
DOI:
10.1063/1.346125
File:
PDF, 421 KB
english, 1990