Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic
Pandey, Sujan, Glesner, ManfredVolume:
15
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2007.903924
Date:
October, 2007
File:
PDF, 977 KB
english, 2007