A 150-V multiple up-drain VDMOS, CMOS, and bipolar process...

IEEE Electron Device Letters 1992 / 09 Vol. 13; Iss. 9

A 150-V multiple up-drain VDMOS, CMOS, and bipolar process in 'direct-bonded' silicon on insulator on silicon

Ifstrom, T., Apel, U., Graf, H.-G., Harendt, C., Hofflinger, B.
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Volume:
13
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/55.192794
Date:
September, 1992
File:
PDF, 185 KB
english, 1992
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