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[IEEE 2014 IEEE Conference on Computer Vision and Pattern Recognition Workshops (CVPRW) - Columbus, OH, USA (2014.6.23-2014.6.28)] 2014 IEEE Conference on Computer Vision and Pattern Recognition Workshops - A High-Performance Hardware Architecture for a Frameless Stereo Vision Algorithm Implemented on a FPGA Platform
Eibensteiner, Florian, Kogler, Juergen, Scharinger, JosefYear:
2014
Language:
english
DOI:
10.1109/cvprw.2014.97
File:
PDF, 340 KB
english, 2014