Designing best effort networks-on-chip to meet hard latency...

ACM Transactions on Embedded Computing Systems 2013 / 06 Vol. 12; Iss. 4

Designing best effort networks-on-chip to meet hard latency constraints

Seiculescu, Ciprian, Rahmati, Dara, Murali, Srinivasan, Sarbazi-Azad, Hamid, Benini, Luca, Micheli, Giovanni De
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Volume:
12
Language:
english
Journal:
ACM Transactions on Embedded Computing Systems
DOI:
10.1145/2485984.2485996
Date:
June, 2013
File:
PDF, 415 KB
english, 2013
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