![](/img/cover-not-exists.png)
Analysis of gate-bias-induced heating effects in deep-submicron ESD protection designs
Kwang-Hoon Oh,, Duvvury, C., Banerjee, K., Dutton, R.W.Volume:
2
Language:
english
Journal:
IEEE Transactions on Device and Materials Reliability
DOI:
10.1109/tdmr.2002.802113
Date:
June, 2002
File:
PDF, 961 KB
english, 2002