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[IEEE 2013 IEEE 31st VLSI Test Symposium (VTS) - Berkeley, CA (2013.4.29-2013.5.2)] 2013 IEEE 31st VLSI Test Symposium (VTS) - Experiments and analysis to characterize logic state retention limitations in 28nm process node
Dasnurkar, S., Datta, A., Abu-Rahma, M., Nguyen, H., Villafana, M., Rasouli, H., Tamjidi, S., Ming Cai,, Sengupta, S., Chidambaram, P. R., Thirumala, R., Kulkarni, N., Seeram, P., Bhadri, P., Patel,Year:
2013
Language:
english
DOI:
10.1109/vts.2013.6548879
File:
PDF, 867 KB
english, 2013