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[IEEE 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Rabat, Morocco (2007.09.2-2007.09.5)] 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - A clock-fault tolerant architecture and circuit for reliable nanoelectronics system
Woon Tiong Ang,, Hui Fei Rao,, Changhong Yu,, Jilin Liu,, I-Chyn Wey,, An-Yeu (Andy) Wu,, Hong Zhao,, Jie Chen,Year:
2007
Language:
english
DOI:
10.1109/dtis.2007.4449516
File:
PDF, 434 KB
english, 2007