Planarization techniques for multilevel HTS integrated...

Planarization techniques for multilevel HTS integrated circuit process

Marathe, A.P., Meng, X., Hebert, D.F., Nagai, Y., Van Duzer, T.
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Volume:
3
Language:
english
Journal:
IEEE Transactions on Appiled Superconductivity
DOI:
10.1109/77.233424
Date:
March, 1993
File:
PDF, 682 KB
english, 1993
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