![](/img/cover-not-exists.png)
[IEEE 2006 IEEE International High Level Design Validation and Test Workshop - Monterey, CA, USA (2006.11.8-2006.11.10)] 2006 IEEE International High Level Design Validation and Test Workshop - Reusable On-Chip System Level Verification for Simulation Emulation and Silicon
Maman, Avishay, Goldschlager, Sharon, Miller, Hillel, Bell, David, Slater, Rob, Ben-Moshe, Oded, Levi, Nissan, Gilboa, HagitYear:
2006
Language:
english
DOI:
10.1109/hldvt.2006.319974
File:
PDF, 9.14 MB
english, 2006