Slope Interconnect Effort: Gate-Interconnect Interdependent...

IEEE Transactions on Circuits and Systems I: Regular Papers 2009 / 07 Vol. 56; Iss. 7

Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Modeling for Early CMOS Circuit Simulation

Myeong-Eun Hwang,, Seong-Ook Jung,, Roy, K.
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Volume:
56
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/tcsi.2008.2006217
Date:
July, 2009
File:
PDF, 2.46 MB
english, 2009
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