[IEEE Comput. Soc. Press 3rd International Workshop on the Economics of Design, Test and Manufacturing - Austin, TX, USA (16-17 May 1994)] Proceedings of 3rd International Workshop on the Economics of Design, Test and Manufacturing - Simultaneous partitioning, scheduling and allocation for synthesis of multi-chip module architectures
Cherabuddi, R. V., Lih-Yih Chiou,, Bayoumi, M. A.Year:
1996
Language:
english
DOI:
10.1109/icedtm.1994.496100
File:
PDF, 636 KB
english, 1996