[IEEE 2007 International Symposium on VLSI Design,...

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[IEEE 2007 International Symposium on VLSI Design, Automation and Test - Hsinchu, Taiwan (2007.04.25-2007.04.27)] 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - A 30Phase 500MHz PLL for 3X Over-Sampling Clock Data Recovery

Cheng, Kuo-Hsing, Chen, Chao-An, Yang, Wei-Bin, Cho, Feng-Hsin
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Year:
2007
Language:
english
DOI:
10.1109/vdat.2007.373236
File:
PDF, 4.29 MB
english, 2007
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